According to foreign reports, in a recent study published in the journal Nature, researchers at the University of California, Berkeley said they have made a major breakthrough in the design of transistors on chips. That is to say, by improving its key role in the switching of the transistor, called the gate oxide layer, the power consumption can be greatly reduced without sacrificing the computing speed and the size of the chip.
According to Sayeef Salahuddin, a distinguished professor of foundry leader TSMC and a professor of electrical engineering and computer science at the University of California, Berkeley, who is the author of the paper, it is currently necessary to pass trillions of dollars worth of semiconductor industry talent. The progress achieved, basically our research has been able to make breakthroughs. It is understood that such an increase in energy consumption is achieved through a so-called negative capacitance effect, which helps reduce the voltage required to store charge in the material. In the past, Sayeef Salahuddin predicted the existence of negative capacitance in a theoretical study in 2008, and also demonstrated this effect in a ferroelectric crystal in 2011.
The new study shows how negative capacitance effects can be created in an engineered crystal composed of layered stacks of hafnium oxide and zirconium oxide. And because this crystal is so compatible with advanced silicon crystals, by incorporating this material, it can be incorporated into transistor models. The study also shows how the negative capacitance effect can greatly reduce the voltage required to control the transistor, and therefore reduce the power consumed by the chip. Salahuddin said that energy consumption for computing has grown exponentially over the past 10 years and now accounts for a single-digit percentage of world energy production. Moreover, this massive number will only grow, and there is no end to it. Therefore, our goal is to reduce this fundamental energy requirement for computing, as this will reduce the energy usage of the entire system.
For now, the most advanced laptops and smartphones contain tens of billions of tiny silicon transistors, each of which must be controlled by applying a voltage. The gate oxide is a thin layer of material that controls the transistor by converting the applied voltage into electric charge, then switching the transistor on and off. In this case, the negative capacitance effect can improve the performance of the gate oxide by reducing the amount of voltage required for a particular charge, but this effect cannot be achieved in any material. So, creating the negative capacitance effect requires careful manipulation of a material property called ferroelectricity, which occurs when a material exhibits a spontaneous electric field. Previously, this effect was only achieved in the ferroelectric material of peroxide, but the crystal structure of peroxide is incompatible with silicon, making it difficult to apply it to the silicon transistors used in current wafers.
In addition, the team noted that by combining hafnium oxide and zirconium oxide in an engineered crystal structure called a superlattice, experiments have also demonstrated that negative capacitance effects can be achieved, and that ferroelectric and antiferroelectric properties can also be achieved. Sex exists at the same time. “This combination actually gives us a better negative capacitance effect, which means this phenomenon is more widespread than originally thought,” said Suraj Cheema, a postdoctoral researcher at the University of California, Berkeley, who was a member of the research team. Much more than just happens in the traditional basis of ferroelectrics and dielectrics. In fact, antiferroelectricity and ferroelectricity can also be exploited by designing these crystal structures to make them more effective.
The report further states that the researchers also found that the total thickness of the superlattice structure consisting of three atomic layers of zirconia sandwiched between two single atomic layers of hafnium oxide is less than two nanometers, which provides the best negative capacitance effect environment. Since most state-of-the-art silicon transistors have used two-nanometer zirconium dioxide consisting of hafnium oxide on top of silicon dioxide, and zirconium oxide is also used in silicon technology, superlattice structures can be easily integrated into advanced transistors. To test the performance of the superlattice structure as zirconium dioxide, the research team also fabricated short-channel transistors and further tested its capabilities. Xie Guo shows that these transistors will require about 30% less voltage than existing transistors, while maintaining the benchmark in the semiconductor industry without compromising reliability.